FPGA
From Albatross
Snapper includes a Altera Cyclone EP1C4 FPGA.
The addition of an FPGA to an avionics system enables many possibilities that would otherwise be unfeasible, and greatly simplifies system design. Because any of the 130+ IO pins can be used for any function, PCB routing is simplified; there is also a much lower chance of a show-stopping error in the PCB layout phase due to the ability to easily reconfigure the FPGA. All the IO interfaces to the avionics system are much more flexible, because with the right FPGA code, even "fixed function" pins like the servo outputs can be used for other purposes.
SPI Interface
The FPGA is the link between the CPU and the sensors. In particular the FPGA is responsible for polling all SPI periphials, and maintianing the most recent measurement for each respective periphial in memory.
We have 3 independent SPI buses, at different speeds and voltage levels:
- a 5V-level bus for the Inertial Sensors ADC
- this operates at the sampling speed of the ADC
- a state-machine in the FPGA sequences the operations needed for each channel-selection/conversion cycle, with no CPU intervention, and maintains individual registers for each sensor reading. This results in a much lower overhead for the CPU to fetch the latest reading - just one register read cycle over the 100 MHz CPU-FPGA interface.
- a 5V-level bus for the Pressure Sensors ADCs
- the CPU initiates conversion on these ADCs; there is no automatic sequencing in the FPGA.
- a 3.3V-level bus for everything else
- temperature sensors
- compass
- CAN-to-SPI bridge
- the CPU initiates operations on this bus (no state-machine in FPGA)
- a 5V-level bus for the Inertial Sensors ADC
The advantage of this approach is that it allows substancial code reuse, for example the SPI controller core may be re-used three times (one for each interface).
GPIO
- We have over 120 IO pins! About 64 will be brought out to the expansion headers, and the rest will be consumend monitoring various sensor pins.
| Pin Usage | |||
|---|---|---|---|
| Pin | Name | Function | Description |
| IO4_M11 | FPGA_IO_0 | Exp2 Pin 3 | Expansion |
| IO1_E04 | FPGA_IO_1 | Exp2 Pin 5 | Expansion |
| IOX_XXX | FPGA_IO_2..63 | ExpX Pin X | Expansion... FIXME |
| IO1_C02 | INIT_DONE | ||
| IO1_D03 | FPGA_SENSE0 | GYRO_MISO | Gyroscope ADC SPI Master In Slave Out |
| IO1_J04 | FPGA_SENSE1 | GYRO_MOSI | Gyroscope ADC SPI Master Out Slave In |
| IO1_D01 | FPGA_SENSE2 | GYRO_SCLK | Gyro ADC SPI Clock |
| IO1_E02 | FPGA_SENSE3 | GYRO_nCS | Gyroscope ADC SPI Chip Select (active low) |
| IO1_E03 | FPGA_SENSE4 | PRES_MISO | Pressure Sensors ADCs SPI Master In Slave Out |
| IO1_F02 | FPGA_SENSE5 | PRES_MOSI | Pressure Sensors ADCs SPI Master Out Slave In |
| IO1_F03 | FPGA_SENSE6 | PRES_SCLK | Pressure Sensors ADCs SPI Clock |
| IO1_F01 | FPGA_SENSE7 | PRES_nCS1 | Pressure Sensor ADC 1 Chip Select (active low) |
| IO1_G03 | FPGA_SENSE8 | PRES_nCS2 | Pressure Sensor ADC 2 Chip Select (active low) |
| IO1_G01 | FPGA_SENSE9 | OTHER_MISO | Other Sensors MISO |
| IO1_G02 | FPGA_SENSE10 | OTHER_MOSI | Other sensors MOSI |
| IO1_H02 | FPGA_SENSE11 | OTHER_SCLK | Other Sensors SCLK |
| IO1_H03 | FPGA_SENSE12 | TC1_nCS | Thermocouple 1 Chip Select (active low) |
| IO1_H01 | FPGA_SENSE13 | TC2_nCS | Thermocouple 2 Chip Select (active low) |
| IO1_K04 | FPGA_SENSE14 | TEMP1_CS | Temperature Sensors Chip Select |
| IO1_L02 | FPGA_SENSE15 | CAN_nCS | CAN Bus bridge Chip Select (active low) |
| IO1_L03 | FPGA_SENSE16 | COMPASS_nCS | Compass Module SPI Chip Select (active low) |
| IO1_M01 | FPGA_SENSE17 | COMPASS_RST | Compass Module Reset |
| IO1_M02 | FPGA_SENSE18 | COMPASS_READY | Compass Module Ready Signal |
| IO1_M03 | FPGA_SENSE19 | FPGA_CAN_nINT | CAN interrupt (active low) |
| IO1_N01 | FPGA_SENSE20 | FPGA_CAN_nRST | CAN Reset (active low) |
| IO1_N02 | FPGA_SENSE21 | FPGA_CAN_SOF | CAN Start Of Frame signal |
| IO2_P04 | FPGA_SENSE22 | FPGA_CAN_TX | FPGA Raw CAN Tx |
| IO2_N03 | FPGA_SENSE23 | FPGA_CAN_RX | FPGA Raw CAN Rx |
| IO2_N04 | FPGA_SENSE24 | CAN_CLK | CAN Clock |
| IO2_P02 | FPGA_SENSE25 | ST8 | IMU Self-test 8 |
| IO2_P03 | FPGA_SENSE26 | ST7 | IMU Self-test 7 |
| IO2_R01 | FPGA_SENSE27 | ST6 | IMU Self-test 6 |
| IO2_R04 | FPGA_SENSE28 | ST5 | IMU Self-test 5 |
| IO2_R02 | FPGA_SENSE29 | ST4 | IMU Self-test 4 |
| IO2_R03 | FPGA_SENSE30 | ST3 | IMU Self-test 3 |
| IO2_T02 | FPGA_SENSE31 | ST2 | IMU Self-test 2 |
| IO2_T03 | FPGA_SENSE32 | ST1 | IMU Self-test 1 |
| IO4_R11 | SERVO_0 | SERVO_0 | Servo 0 PWM waveform |
| IO4_T11 | SERVO_1 | SERVO_1 | Servo 1 PWM waveform |
| IO4_U15 | SERVO_2 | SERVO_2 | Servo 2 PWM waveform |
| IO4_V15 | SERVO_3 | SERVO_3 | Servo 3 PWM waveform |
| IO4_U12 | SERVO_4 | SERVO_4 | Servo 4 PWM waveform |
| IO4_V12 | SERVO_5 | SERVO_5 | Servo 5 PWM waveform |
| IO4_U11 | SERVO_6 | SERVO_6 | Servo 6 PWM waveform |
| IO4_V11 | SERVO_7 | SERVO_7 | Servo 7 PWM waveform |
| IO4_R06 | LOOM_RX | LOOM_RX | Loom Serial Port Rx |
| IO4_V07 | LOOM_TX | LOOM_TX | Loom Serial Port Tx |
| IO4_U04 | GPS_nRST | GPS_nRST | GPS Module Reset (active low) |
| IO4_T04 | RX_PWM | RX_PWM | PWM input signal from RC Radio Rx |
| IO4_U05 | nMANUAL_MODE | nMANUAL_MODE | From AVR Supervisor, tells FPGA to go into manual mode |
| IO4_T05 | COMM_IN_RNG | COMM_IN_RNG | Communications in range |
| IO4_U06 | COMM_DnCMD | COMM_DnCMD | Comm Radio Data or Command Mode |
| IO4_V06 | COMM_nHOP | COMM_nHOP | Comm Radio Frequency Hopping in progress |
| IO1_D02 | FPGA_PWM | FPGA_PWM | Multiplex servo outputs to RC Rx |
FPGA Memory Map
As mentioned in the Snapper page, the FPGA is mapped into the PXA's memory. The interface is 32bits wide. The table below lists each memory address, and a description of the data it contains.
(FIXME: Dear god a massive table)
